This disclosure relates to flash memory devices, and more particularly, to a method of controlling a program operation of flash memory devices including multi-level cells.
In general, memory cells of a flash memory device can be classified into a Single Level Cell (SLC) and a Multi Level Cell (MLC) depending on the bit number of data stored therein. 1-bit data having a logic value of “1” or “0” can be stored in the SLC. 2-bit data having a logic value of one of “11”, “10”, “01” and “00” can be stored in the MLC. Therefore, flash memory devices including MLCs are mainly used in high-integration semiconductor devices requiring a large capacity of data storage space. The program operation of a flash memory device including MLCs is executed on a page basis. In more detail, as a word line bias voltage for program is applied to word lines to which MLCs of a selected page are connected, the MLCs are programmed. In general, the threshold voltage of the MLC is varied with the program operation proceeding.
In more detail, the threshold voltage of an MLC (i.e., an erased cell) in which data of “11” is stored is Vt1 and the threshold voltage of an MLC in which data of “10” is stored is Vt2. Furthermore, the threshold voltages of MLCs in which data of “00” and “01” are respectively stored are Vt3 and Vt4. The voltages (Vt1 to Vt4) have the relation of Vt4>Vt3>Vt2>Vt1. Therefore, the threshold voltage (Vt4) of the MLC in which data of “01” is stored is the highest and the threshold voltage (Vt1) of the MLC in which data of “11” is stored is the lowest. The program operation process of the flash memory device including these MLCs will be described in more detail with reference to FIG. 1.
As shown in FIG. 1, the program process 10 of the flash memory device including the MLCs includes three program processes and three verify processes. In the first program process at block 11, the threshold voltage of the MLC is changed from Vt1 to Vt2 (a voltage corresponding to data “10”). In the first verify process at block 12, it is verified whether all MLCs to be programmed have been programmed. At this time, in the case of cells whose operating speed is fast (i.e., a fast cell), it means that the program has been completed as determined at block 13. In the case of cells whose operating speed is slow (i.e., a slow cell), it means that the program has not yet been completed and programming into programmed cells in stopped at block 14. Therefore, for a re-program operation of the slow cells, the program operation of the fast cells is prohibited. As a result, the program operation on the fast cells is not performed until the program operation of the slow cells is completed.
Even in the second and third program processes at blocks 15, 19, respectively, in the same manner as the aforementioned first program process, the program is prohibited so that a next program step is not performed until the slow cells are all programmed even though the fast cells are already programmed. In the second and third verify processes 16, 17, respectively, it is verified whether all MLCs to be programmed have been programmed, and the program is completed or not completed as determined at blocks 17, 21, respectively, in the same manner as the aforementioned process. If not completed, programming into programmed cells is stopped at blocks 18, 22, respectively. If completed after the third verify process at block 20, the program operation is stopped at block 23. Therefore, a problem arises because the whole program time of the flash memory device is increased.
In more detail, for example, there is a case where data of “01” are programmed into the fast cells and data of “00” are programmed into the slow cells. In this case, the program operation of the fast cells is prohibited until the threshold voltage of the slow cells becomes a threshold voltage level corresponding to data of “00” even though the threshold voltage of the fast cells becomes the threshold voltage level corresponding to data of “00” by means of the first and second program processes.
Thereafter, if the threshold voltage of the slow cells becomes a threshold voltage level corresponding to data of “00”, the program operation of the fast cells is again performed, so that the threshold voltage of the fast cells is changed from the threshold voltage corresponding to data of “00” to the threshold voltage corresponding to data of “01”. In the method of controlling the program operation of the flash memory device in the related art, however, the program operation of the fast cells is delayed due to the slow cells as described above. Therefore, a problem arises because an overall program time is increased.